\begin{figure}
	\centering
	\includegraphics[width=12cm]{Images/turbo_bn}
	\caption{Draft of the \textit{turbo} card}
	\label{turbo}
\end{figure}
We used two \textbf{turbo} cards to control the VFAT2 chips during the tests.\\

Developed on the basis of the TOTEM Test Platform \textit{TTP}\footnote{\textit{TTP}s are platforms aimed at checking the functioning of VFAT chips and hybrids, in use at TOTEM.}, \textit{turbo} is a stand-alone portable control and DAQ platform for front-end VFAT2 chips. It was designed by Dr. Roberto Cecchi and Dr. Maria Grazia Bagliesi\footnote{University of Siena}; an outline of the card is shown in \figurename~\vref{turbo}.\\

Each \textit{turbo} hosts an ALTERA Stratix II FPGA, which can interface with up to 8 VFAT2 chips via I\superscript{2}C lines; configurations allowing to control more chips are currently under development. The card also features a Bitwise Systems \textit{Quick-USB} interface, so that it can be controlled via PC.\\

LabVIEW softwares were programmed to automate standard scans such as threshold, latency and calibration pulse scans; data acquisition and quality monitor programs can also be run through a PC connected to the card.\\
%
%The following list summarizes \textit{turbo} principal specifications; please refer to the designers for a complete characterization.
%\begin{itemize}
%	\item[\textbf{FPGA}] ALTERA Stratix II EP2S60F672
%	\item[\textbf{Internal clock}] $80 MHz$ XO IQD LFSPXO009441
%	\item[\textbf{Input modes}] $4 \cdot$LVDS; $2 \cdot$NIM, $2 \cdot$LVTTL
%	\item[\textbf{Output modes}] $4 \cdot$LVDS; $2 \cdot$NIM, $10bit$ DAC ($3.3mV$)
%\end{itemize}